The present invention relates to a photosensitive row or line transfer device provided with negative feedback amplifiers.
Photosensitive row transfer devices are well known in the art and reference can eg be made to U.S. Pat. No. 4,506,299.
It is pointed out that such devices generally comprise:
a photosensitive zone of M rows of N photosensitive points, on which the image to be read is projected and converted into electrical charges, called signal charges;
an interface member of M points, called the row memory, connected via conductive columns to photosensitive points or elements of the different rows and which receives successively, in a preferred operating mode, parasitic or interfering charges on the columns prior to the arrival of the signal charges and the signal charges stored by each row:
a charge transfer shift register, which receives the signal charges from the memory and supplies in series the electric image analysis signal;
a drain for removing or discharging the parasitic charges from the memory.
U.S. Pat. No. #4,577,231 assigned to the Hitachi Corp., relates to photosensitive row transfer devices provided with negative feedback amplifiers. The input of these amplifiers is connected to a conductive column and to a diode, called the input diode of the row memory and the output thereof is connected to a transfer gate of the memory, adjacent to one of the input diodes.
Negative feedback amplifiers have the advantage of dividing the apparent capacitance C of the conductive columns by G+1, in which G is the gain of the amplifiers, which is generally approximately 50.
Consequently, the transfer of the charges of the columns to the memory take place more rapidly and the transfer efficiency for a given transfer time is improved. The time noise due to the channel located beneath each gate of the memory connected to an amplifier is reduced, because it is proportional to .sqroot.C.
A major disadvantage of negative feedback amplifiers to be demonstrated by the Applicant in the detailed description of the drawings, is that it is not possible if satisfactory operation is required, to connect them to the gate of the memory having a buried channel for the bulk transfer. It is therefore necessary to use gates and consequently a memory with a surface channel for surface transfer.
All the advantages occurring in the case of a memory, having a buried channel have been previously described and the advantages thereof will now briefly be summarized. In order to obtain a maximum transfer efficiency, a buried channel read register is generally used. The use of a memory having a buried channel permits a bilateral transfer of the charges between the memory and the read register, which is particularly advantageous in the case of operation with a double drive charge. In the case where a memory with a surface channel is used, it is not possible to transfer the charges from the register to the memory because, for the same voltage applied to the gates, the surface potentials are at a higher level in the case of a buried channel bulk transfer than in the case of a surface 15 channel transfer. The use of a memory having a buried channel also makes it possible to improve the vertical transfer efficiency. This efficiency is inversely proportional to the capacity of the columns, which is reduced as a result of a buried channel. Thus, the columns are essentially constituted by interconnected read diodes, which are reverse polarized. As a result of the volume transfer, these diodes receive a higher polarization or bias voltage for identical voltages applied to the elements of the row memory and the capacity of the said diodes is reduced. Moreover, the noise during transfers between the columns and the row memory has two origins, namely a thermal noise which is proportional to the square root of the column capacity and a noise which is proportional to the surface and volume traps beneath the transfer gate between the columns and the row memory. The use of buried channels reduces these two components by reducing the capacity of the columns, as was stated hereinbefore and by eliminating interface traps.
Another disadvantage of negative feedback amplifiers is that they introduce noise, more particularly low frequency noise. In certain cases, this noise can be as high as that of the read noise introduced by the transfer gate channel between the columns and the memory.
The present invention makes it possible to solve the aforementioned problems. It more particularly permits the use of a transfer gate between the columns and the memory and of a memory having of the buried channel type. According to a special embodiment, the invention also makes it possible to reduce the low frequency noise due to the negative feedback amplifiers.